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Fri, Oct 27 items
0 of 7 readToday's focus is the ripple effect across the AI compute supply chain: soaring memory prices are passing downstream, OpenAI's in-house ASIC pairs with AMD CPUs, and Amazon signed a $1B-plus chip design deal with Synopsys.
Amazon and Synopsys sign $1B-plus multi-year chip design deal
Amazon will license Synopsys chip designs and tools to build and optimize new AI chips; Synopsys will adopt Amazon Bedrock for AI agents and use AWS compute and storage.
Why it mattersDeepening ties between a cloud giant's custom silicon and EDA tools could reshape competition in the AI chip design toolchain.
OpenAI's Jalapeño ASIC pairs with AMD EPYC Turin as host CPU
OpenAI chose AMD EPYC Turin CPUs to host its rack-scale Jalapeño ASIC deployments, rather than high-performance agentic chips like Arm's AGI or Nvidia's Vera.
Why it mattersThe host CPU choice for a custom accelerator signals another key design win for AMD in the AI data-center ecosystem.
Memory price surge ripples: Micron 88% consumer margin, Huawei hikes prices
Micron's consumer memory margin hit 88% in fiscal Q4 2026; Huawei raised flagship prices citing ~$200 higher per-unit costs, while Climax stays cautious on 2H26.
Why it mattersAI infrastructure is squeezing memory supply, passing costs from memory makers down to device vendors and consumers.
Toshiba to double HDD capacity in Philippines, 30TB drives in 2027
Amid severe shortages, Toshiba plans to double HDD capacity in the Philippines in fiscal 2027, in time for 30TB-class drive ramp in 2027.
Why it mattersHDD expansion amid storage shortages will shape supply timing for data-center cold and nearline storage.
AI server shipments accelerate in 2026 as clouds and labs expand
Advances in top-tier LLMs and agentic AI business automation are prompting major North American clouds, Neo Clouds and leading AI labs to accelerate AI data-center buildouts in 2026.
Why it mattersSustained demand growth gives chip, packaging and server supply chains visibility into 2026.
ficonTEC and Hermes Testing partner to scale CPO testing
ficonTEC and Hermes Testing formed a strategic partnership to support Taiwan's expanding co-packaged optics ecosystem, initially focusing on the INS-2 test platform and double-sided wafer-level testing.
Why it mattersCPO test capacity is a key bottleneck for scaling optical interconnects, and the partnership could speed industrialization.
Chip industry weekly: CFETs beyond 10A, AI data centers drive power and packaging investment
Highlights include CFETs pushing scaling beyond 10 angstroms, physical AI M&A and funding, AI data centers driving power and packaging investment, photonics nearing compute, and 88k engineers needed.
Why it mattersA one-page view of leading-edge process, investment and talent gaps helps track the industry's mid-term direction.